Module DS1307 RTC - real time clock

published: 9 November 2019 / updated 9 November 2019

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Presentation

The DS1307 serial real-time clock (RTC) is a low-power, full binary-coded decimal (BCD) clock/calendar plus 56 bytes of NV SRAM. Address and data are transferred serially through an I2C, bidirectional bus. The clock/calendar provides seconds, minutes, hours, day, date, month, and year information. The end of the month date is automatically adjusted for months with fewer than 31 days, including corrections for leap year. The clock operates in either the 24-hour or 12-hour format with AM/PM indicator. The DS1307 has a built-in power-sense circuit that detects power failures and automatically switches to the backup supply. Timekeeping operation continues while the part operates from the backup supply.

Module à 5 connecteurs
Module à 4 connecteurs

Timekeeper Registers

The content of Timekeeper registers is in BCD (Binary Coded Decimal value) format.

There are total eight registers in timekeeper register for setting seconds, Minutes, Hours, Day, Date, Month, year and control.

Once we set the value of these registers, they will keep updating themselves, and we can read these registers to get updated values.

ADDRESSBIT 7 BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0 FUNCTIONRANGE
00hCH 10 Seconds SecondsSeconds00–59
01h0 10 Minutes MinutesMinutes00–59
02h0 1210
Hour
10
Hour
Hours Hours 1-12
+AM/PM
00-23
24PM/
AM
03h00000 DAY Day01–07
04h00 10 Date Date Date01–31
05h000 10
Month
Month Month01-12
06h 10 Year Year Year00–99
07hOUT00SQWE0 0RS1RS0Control
08h–3FhRAM
56 x 8
00h–FFh

Control register

The DS1307 control register is used to control the operation of the SQW/OUT pin.

BIT 7BIT 6BIT 5BIT 4 BIT 3BIT 2BIT 1BIT 0
OUT00SQWE 00RS1RS0

Bit 7: Output Control (OUT). This bit controls the output level of the SQW/OUT pin when the square-wave output is disabled. If SQWE = 0, the logic level on the SQW/OUT pin is 1 if OUT = 1 and is 0 if OUT = 0. On initial application of power to the device, this bit is typically set to a 0.

Bit 4: Square-Wave Enable (SQWE). This bit, when set to logic 1, enables the oscillator output. The frequency of the square-wave output depends upon the value of the RS0 and RS1 bits. With the square-wave output set to 1Hz, the clock registers update on the falling edge of the square wave. On initial application of power to the device, this bit is typically set to a 0.

Bits 1 and 0: Rate Select (RS[1:0]). These bits control the frequency of the square-wave output when the square-wave output has been enabled. The following table lists the square-wave frequencies that can be selected with the RS bits. On initial application of power to the device, these bits are typically set to a 1.

RS1RS0SQW/OUT OUTPUT SQWEOUT
001Hz1X
014.096kHz1X
108.192kHz1X
1132.768kHz1X
XX000
XX101

DS1307 Specifications